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PRODID:-//Microsoft Corporation//Outlook MIMEDIR//EN
VERSION:2.0
BEGIN:VEVENT
DTSTART:20151118T220000Z
DTEND:20151118T223000Z
LOCATION:12AB
DESCRIPTION;ENCODING=QUOTED-PRINTABLE:ABSTRACT: Massive, efficient, and manageable parallelism is the core of HPC and the next stage of computing evolution. Computing is increasingly dominated by intrinsically parallel interaction with the physical world using approaches such as deep learning. Incremental improvement to conventional compute architectures have dramatically slowed - some to say we are on the cusp of a silicon "apocalypse". We are rethinking computing; disruptive hardware and architecture are increasingly appearing at SC. GPUs started the trend but are challenged in power efficiency, failing to address the communication cost of Von Neumann-style computing. The Micron Automata Processor used two old/new concepts, NFA and memory topology to propose a new computing approach. FPGAs are the old/new architecture now, with their intrinsic parallelism, reconfigurability and heterogeneous fabric offering tantilizing possibilities for energy-efficient high performance computation. With new architectures come new ways to express parallel computation, e.g., CUDA, ANML, OpenCL and domain-specific languages for neural nets.
SUMMARY:Strangely Parallel ... new, old parallel hardware, architecture and languages
PRIORITY:3
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